1. Technical Field of the Invention
This invention relates generally to a method for fabricating silicon bipolar transistors having polysilicon contacted terminals and, more particularly, to a method for fabricating silicon bipolar transistors having a polysilicon emitter and a polysilicon contacted base which incorporates a single polysilicon deposition step.
2. Discussion of the Related Art
It is generally well understood in the art to incorporate polysilicon contact regions for one or all of the emitter, base and collector of a silicon bipolar transistor. Typically, it is more desirable for at least the emitter and base to have polysilicon contact regions. By utilizing these polysilicon contact regions, it is possible to develop silicon bipolar transistors of reduced dimensions having an acceptable parasitic capacitance, thus improving or maintaining the performance characteristics of the transistor. In particular, advances in the art have enabled production of silicon bipolar transistors having emitters which are very thin. By developing the emitter region of the transistor very thin, it is possible to provide an emitter which is almost entirely made up of polysilicon, therefore even further reducing the parasitic capacitance.
The prior art processes necessary to fabricate silicon bipolar transistors having polysilicon emitter regions and base contact regions for the most part have required complex deposition steps in addition to the complexity of fabricating silicon bipolar transistors without these regions. More specifically, the prior art methods generally require two or more polysilicon deposition steps due to the stringent requirements of emitter and base contact region thicknesses and the need to electrically separate the emitter contact region and the base contact region. Likewise, in advanced fabrication processes of complementary NPN and PNP silicon bipolar transistors on a common substrate, it has been necessary to provide a two or three step polysilicon deposition process to provide the polysilicon emitter and base regions for both of the devices.
The problems with fabricating bipolar transistors incorporating multiple polysilicon deposition steps are further highlighted in fabricating bipolar transistors with emitters having widths less than 0.5 microns. In the prior art devices, it was generally required that the polysilicon region of the emitter be insitu-doped in order to avoid narrow emitter effects in bipolar transistors having this type of emitter. This was a requirement due to the disparity in emitter width generated from a doping implantation step after the polysilicon had been deposited. Consequently, the requirement of insitu-doped polysilicon emitters maintained the need for separate polysilicon deposition steps for the emitter region and base contact region.
What is needed then is a bipolar transistor fabrication process which provides polysilicon emitter regions and base contact regions in which the polysilicon deposition process is simplified over the prior art bipolar transistor fabrication processes. It is therefore an object of the present invention to provide such a process.